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Julianne Kur

Principal
Alliance Consumer Growth

Julianne Kur

Principal
Alliance Consumer Growth

Julianne Kur

Principal
Alliance Consumer Growth

Location: Room 206

Duration: 1 hour

Experience the future of GenAI inference architecture with NeuReality’s fully integrated, enterprise-ready NR1® Inference Appliance. In this hands-on workshop, you'll go from cold start to live GenAI applications in under 30 minutes using our AI-CPU-powered system. The NR1® Chip – the world’s first AI-CPU purpose built for interference – pairs with any GPU or AI accelerator and optimizes any AI data workload. We’ll walk you through setup, deployment, and real-time inference using models like LLaMA, Mistral, and DeepSeek on our disaggregated architecture—built for smooth scalability, superior price/performance and near 100% GPU utilization (vs <50% with traditional CPU/NIC architecture). Join us to see how NeuReality eliminates infrastructure complexity and delivers enterprise-ready performance and ROI today.

Location: Room 201

Duration: 1 hour

Author:

Paul Piezzo

Enterprise Sales Director
NeuReality

Paul Piezzo

Enterprise Sales Director
NeuReality

Author:

Gaurav Shah

VP of Business Development
NeuReality

Gaurav Shah

VP of Business Development
NeuReality

Author:

Naveh Grofi

Customer Success Engineer
NeuReality

Naveh Grofi

Customer Success Engineer
NeuReality

Join us in this hands-on workshop to learn how to deploy and optimize large language models (LLMs) for scalable inference at enterprise scale. Participants will learn to orchestrate distributed LLM serving with vLLM on Amazon EKS, enabling robust, flexible, and highly available deployments. The session demonstrates how to utilize AWS Trainium hardware within EKS to maximize throughput and cost efficiency, leveraging Kubernetes-native features for automated scaling, resource management, and seamless integration with AWS services.

Location: Room 206

Duration: 1 hour

Author:

Asheesh Goja

Principal GenAI Solutions Architect
AWS

Asheesh Goja

Principal GenAI Solutions Architect
AWS

Author:

Pinak Panigrahi

Sr. Machine Learning Architect - Annapurna ML
AWS

Pinak Panigrahi

Sr. Machine Learning Architect - Annapurna ML
AWS

As AI workload demands continue to accelerate, Cloud Service Providers, System OEMs, and IP/Silicon vendors require a scalable, high-performance solution to support advanced workloads. By enhancing performance, optimizing power and cost efficiency, and promoting interoperability and supply chain diversity, the UALink 200G 1.0 Specification delivers a low-latency, high-bandwidth interconnect designed for efficient communication between accelerators and switches within AI computing pods.

Location: Room 201

Duration: 40 minutes

Today’s AI designs stress verification teams to an unprecedented extent. The compound complexity from software, hardware, interfaces, and architecture options leads to the challenge of running quadrillions of verification cycles across IP, sub-systems, SoCs, and Multi-die designs. Learn how industry leaders like AMD, Arm, Nvidia, and others address these challenges with Synopsys’ latest family of Hardware-Assisted Verification products, modularity of verification, and mixed-fidelity execution setups using virtual prototyping, emulation, and FPGA-based prototyping.

Author:

Frank Schirrmeister

Executive Director, Strategic Programs, System Solutions
Synopsys

Frank Schirrmeister is Executive Director, Strategic Programs, System Solutions in Synopsys' System Design Group. He leads strategic activities across system software and hardware assisted development for industries like automotive, data center and 5G/6G communications, as well as for horizontals like Artificial Intelligence / Machine Learning. Prior to Synopsys, Frank held various senior leadership positions at Arteris, Cadence Design Systems, Imperas, Chipvision, and SICAN Microelectronics, focusing on product marketing and management, solutions, strategic ecosystem partner initiatives, and customer engagement. He holds an MSEE from the Technical University of Berlin and actively participates in cross-industry initiatives as Chair of the Design Automation Conference's Engineering Tracks.

Frank Schirrmeister

Executive Director, Strategic Programs, System Solutions
Synopsys

Frank Schirrmeister is Executive Director, Strategic Programs, System Solutions in Synopsys' System Design Group. He leads strategic activities across system software and hardware assisted development for industries like automotive, data center and 5G/6G communications, as well as for horizontals like Artificial Intelligence / Machine Learning. Prior to Synopsys, Frank held various senior leadership positions at Arteris, Cadence Design Systems, Imperas, Chipvision, and SICAN Microelectronics, focusing on product marketing and management, solutions, strategic ecosystem partner initiatives, and customer engagement. He holds an MSEE from the Technical University of Berlin and actively participates in cross-industry initiatives as Chair of the Design Automation Conference's Engineering Tracks.

MooresLabAI is redefining the semiconductor development lifecycle with its Agentic AI platform — purpose-built for silicon teams. In this live demo, we’ll showcase VerifAgent™, our flagship AI-powered verification agent that slashes engineering time by 85% and accelerates time-to-market by 7x. Seamlessly integrating with standard EDA tools, VerifAgent automates testbench creation, debugging, and coverage — without requiring prompt engineering or changes to your flows. Join us to see how MooresLabAI’s platform brings human-grade precision, machine speed, and real-world silicon expertise into one powerful development force.

Author:

Shelly Henry

CEO & Co-founder
MooresLabAI

Shelly Henry is the CEO and Co-Founder of MooresLabAI, a company pioneering Agentic AI for semiconductor design and verification. With over 25 years of experience in silicon engineering and AI, including leadership roles at Microsoft and ARM, Shelly is driven by a mission to transform chip development through intelligent automation. He has led teams building high-performance SoCs and has a deep understanding of the verification bottlenecks plaguing the industry. At MooresLabAI, Shelly combines his technical expertise and entrepreneurial vision to accelerate chip innovation and empower engineering teams worldwide.

Shelly Henry

CEO & Co-founder
MooresLabAI

Shelly Henry is the CEO and Co-Founder of MooresLabAI, a company pioneering Agentic AI for semiconductor design and verification. With over 25 years of experience in silicon engineering and AI, including leadership roles at Microsoft and ARM, Shelly is driven by a mission to transform chip development through intelligent automation. He has led teams building high-performance SoCs and has a deep understanding of the verification bottlenecks plaguing the industry. At MooresLabAI, Shelly combines his technical expertise and entrepreneurial vision to accelerate chip innovation and empower engineering teams worldwide.

 

Frank Schirrmeister

Executive Director, Strategic Programs, System Solutions
Synopsys

Frank Schirrmeister is Executive Director, Strategic Programs, System Solutions in Synopsys' System Design Group. He leads strategic activities across system software and hardware assisted development for industries like automotive, data center and 5G/6G communications, as well as for horizontals like Artificial Intelligence / Machine Learning.

Frank Schirrmeister

Executive Director, Strategic Programs, System Solutions
Synopsys

Frank Schirrmeister

Executive Director, Strategic Programs, System Solutions
Synopsys

Frank Schirrmeister is Executive Director, Strategic Programs, System Solutions in Synopsys' System Design Group. He leads strategic activities across system software and hardware assisted development for industries like automotive, data center and 5G/6G communications, as well as for horizontals like Artificial Intelligence / Machine Learning. Prior to Synopsys, Frank held various senior leadership positions at Arteris, Cadence Design Systems, Imperas, Chipvision, and SICAN Microelectronics, focusing on product marketing and management, solutions, strategic ecosystem partner initiatives, and customer engagement. He holds an MSEE from the Technical University of Berlin and actively participates in cross-industry initiatives as Chair of the Design Automation Conference's Engineering Tracks.